(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a method used to determine endpoint of an insulator dry etching procedure, used to create planar insulator filled shallow trenches.
(2) Description of Prior Art
The semiconductor industry is continually striving to improve device performance, while still attempting to reduce the manufacturing cost of specific metal oxide semiconductor field effect transistor, (MOSFET), devices. The ability to create MOSFET devices with sub-micron features, or micro-miniaturization, has allowed these objectives to be realized. Devices with sub-micron features exhibit less performance degrading resistances and capacitances, thus improving device performance. In addition devices with sub-micron features, allow smaller semiconductor chips to be obtained, still possessing equal, or greater, circuit densities than counterparts, fabricated using larger features. The use of smaller chips allow a greater number of chips to be realized from a specific size starting semiconductor substrate, thus reducing the manufacturing cost of a specific chip.
The realization of semiconductor devices, with sub-micron features, has been mainly attributed to advances in specific semiconductor fabrication disciplines, used in the manufacture of sub-micron MOSFET devices, such as photolithography and dry etching. The use of more advanced exposure cameras, as well as the use of more sensitive photoresist materials, have allowed sub-micron features to be routinely obtained in photoresist layers. In addition the development of advanced dry etching tools and procedures, have allowed the sub-micron images in overlying photoresist layers, to be successfully transferred to underlying materials, used in the manufacture of sub-micron MOSFET devices. However the use of dry etching procedures demands adequate etch rate selectivity between the material being etched, and the underlying material, used as an etch stop layer. For example if silicon oxide, used to fill a shallow trench, is to be removed from the top surface of a silicon nitride layer, in regions outside the shallow trench, or in subsequent device regions, a dry etch chemistry offering higher removal rates of silicon oxide, compared to silicon nitride, is needed to prevent silicon nitride erosion at the completion of the silicon oxide removal. In addition if a photoresist shape, defining the region of silicon oxide to be removed, is misaligned, silicon oxide in the shallow trench can be exposed to a silicon oxide overetch procedure, used to insure complete removal of silicon oxide from the surface of silicon nitride. This would result in a non-planar, insulator filled trench.
This invention will describe a method for determining an early and sharp endpoint, for a dry etching procedure, used for silicon oxide. This invention will allow the dry etching procedure used for silicon oxide, to terminate when between about 100 to 500 Angstroms of silicon oxide still remains on an underlying silicon nitride layer. The early endpoint detection removes the possibility of etching underlying silicon nitride, for cases in which poor etch rate selectivity between silicon oxide and silicon nitride exist, while also offering protection from etching of silicon oxide, in the shallow trench, for cases of misalignment. The remaining 100 to 500 Angstroms of silicon oxide are removed during a subsequent planarizing, chemical mechanical polishing procedure. Prior art, such as Gifford, et al, in U.S. Pat. No. 5,200,023, describe a method for measuring the progress of a dry etching procedure, however an infrared thermographic method is employed for that invention.